DRA722_17 Datasheet, PDF (16/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
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BALL NUMBER
[1]
BALL NAME [2]
AC24
ddr1_d14
AD25
ddr1_d15
V20
ddr1_d16
W20
ddr1_d17
AB28
ddr1_d18
AC28
ddr1_d19
AC27
ddr1_d20
Y19
ddr1_d21
AB27
ddr1_d22
Y20
ddr1_d23
AA23
ddr1_d24
Y22
ddr1_d25
Y23
ddr1_d26
AA24
ddr1_d27
Y24
ddr1_d28
AA26
ddr1_d29
AA25
ddr1_d30
AA28
ddr1_d31
AD23
ddr1_dqm0
AB23
ddr1_dqm1
AC26
ddr1_dqm2
AA27
ddr1_dqm3
V26
ddr1_dqm_ecc
SIGNAL NAME [3]
ddr1_d14
ddr1_d15
ddr1_d16
ddr1_d17
ddr1_d18
ddr1_d19
ddr1_d20
ddr1_d21
ddr1_d22
ddr1_d23
ddr1_d24
ddr1_d25
ddr1_d26
ddr1_d27
ddr1_d28
ddr1_d29
ddr1_d30
ddr1_d31
ddr1_dqm0
ddr1_dqm1
ddr1_dqm2
ddr1_dqm3
ddr1_dqm_ecc
Table 4-2. Ball Characteristics⁽¹⁾ (continued)
MUXMODE
[4]
TYPE [5]
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
O
0
O
0
O
0
O
0
O
BALL
RESET
STATE [6]
BALL
RESET REL.
STATE [7]
BALL
RESET REL.
MUXMODE
[8]
I/O
VOLTAGE
VALUE [9]
POWER [10]
HYS [11]
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PD
PD
1.35/1.5
vdds_ddr1 No
PU
drive 1 (OFF)
1.35/1.5
vdds_ddr1 No
PU
drive 1 (OFF)
1.35/1.5
vdds_ddr1 No
PU
drive 1 (OFF)
1.35/1.5
vdds_ddr1 No
PU
drive 1 (OFF)
1.35/1.5
vdds_ddr1 No
PU
drive 1 (OFF)
1.35/1.5
vdds_ddr1 No
BUFFER
TYPE [12]
PULL
UP/DOWN
TYPE [13]
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
LVCMOS
DDR
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
PUx/PDy
DSIS [14]
16
Terminal Configuration and Functions
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