DRA722_17 Datasheet, PDF (149/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Instance Name
TIMER8
TIMER9
TIMER10
Table 5-9. Maximum Supported Frequency (continued)
Module
Input Clock Name
TIMER8_ICLK
TIMER8_FCLK
Clock
Type
Int
Func
Max. Clock
Allowed (MHz)
266
100
PRCM Clock Name
IPU_L3_GICLK
TIMER8_GFCLK
Clock Sources
PLL / OSC /
Source Clock
Name
CORE_X2_CLK
SYS_CLK1
FUNC_32K_CLK
SYS_CLK2
XREF_CLK0
XREF_CLK1
XREF_CLK2
XREF_CLK3
DPLL_ABE_X2_CL
K
VIDEO1_CLK
HDMI_CLK
CLKOUTMUX[0]
TIMER9_ICLK
Int
266
L4PER_L3_GICLK
CORE_X2_CLK
TIMER9_FCLK
Func
100
TIMER9_GFCLK
SYS_CLK1
FUNC_32K_CLK
SYS_CLK2
XREF_CLK0
XREF_CLK1
XREF_CLK2
XREF_CLK3
DPLL_ABE_X2_CL
K
VIDEO1_CLK
HDMI_CLK
TIMER10_ICLK
Int
266
L4PER_L3_GICLK
CORE_X2_CLK
TIMER10_FCLK
Func
100
TIMER10_GFCLK
SYS_CLK1
FUNC_32K_CLK
SYS_CLK2
XREF_CLK0
XREF_CLK1
XREF_CLK2
XREF_CLK3
DPLL_ABE_X2_CL
K
VIDEO1_CLK
HDMI_CLK
PLL / OSC /
Source Name
DPLL_CORE
OSC1
OSC1
RTC Oscillator
OSC2
XREF_CLK0
XREF_CLK1
XREF_CLK2
XREF_CLK3
DPLL_ABE
DPLL_VIDEO1
DPLL_HDMI
CLKOUTMUX[0]
DPLL_CORE
OSC1
OSC1
RTC Oscillator
OSC2
XREF_CLK0
XREF_CLK1
XREF_CLK2
XREF_CLK3
DPLL_ABE
DPLL_VIDEO1
DPLL_HDMI
DPLL_CORE
OSC1
OSC1
RTC Oscillator
OSC2
XREF_CLK0
XREF_CLK1
XREF_CLK2
XREF_CLK3
DPLL_ABE
DPLL_VIDEO1
DPLL_HDMI
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Specifications 149