DRA722_17 Datasheet, PDF (70/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
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BALL NUMBER
[1]
BALL NAME [2]
AC13
xo_osc1
D18
xref_clk0
E17
xref_clk1
B26
xref_clk2
SIGNAL NAME [3]
xo_osc1
xref_clk0
mcasp2_axr8
mcasp1_axr4
mcasp1_ahclkx
mcasp5_ahclkx
atl_clk0
vin1a_d0
hdq0
clkout2
timer13
gpio6_17
Driver off
xref_clk1
mcasp2_axr9
mcasp1_axr5
mcasp2_ahclkx
mcasp6_ahclkx
atl_clk1
vin1a_clk0
timer14
gpio6_18
Driver off
xref_clk2
mcasp2_axr10
mcasp1_axr6
mcasp3_ahclkx
mcasp7_ahclkx
atl_clk2
vout2_clk
vin2a_clk0
vin1a_clk0
timer15
gpio6_19
Driver off
Table 4-2. Ball Characteristics⁽¹⁾ (continued)
MUXMODE
[4]
TYPE [5]
0
A
0
I
1
IO
2
IO
3
O
4
O
5
O
7
I
8
IO
9
O
10
IO
14
IO
15
I
0
I
1
IO
2
IO
3
O
4
O
5
O
7
I
10
IO
14
IO
15
I
0
I
1
IO
2
IO
3
O
4
O
5
O
6
O
8
I
BALL
RESET
STATE [6]
BALL
RESET REL.
STATE [7]
BALL
RESET REL.
MUXMODE
[8]
I/O
VOLTAGE
VALUE [9]
POWER [10]
HYS [11]
1.8
vdda_osc No
PD
PD
15
1.8/3.3
vddshv3
Yes
PD
PD
15
1.8/3.3
vddshv3
Yes
PD
PD
15
1.8/3.3
vddshv3
Yes
BUFFER
TYPE [12]
PULL
UP/DOWN
TYPE [13]
DSIS [14]
LVCMOS NA
Analog
Dual Voltage PU/PD
LVCMOS
0
0
0
1
Dual Voltage PU/PD
LVCMOS
0
0
0
Dual Voltage PU/PD
LVCMOS
0
0
10
IO
14
IO
15
I
70
Terminal Configuration and Functions
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