DRA722_17 Datasheet, PDF (201/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Table 7-7. Manual Functions Mapping for VIN2A (IOSET4/5/6) (continued)
BAL BALL NAME
VIP_MANUAL3
VIP_MANUAL5
CFG REGISTER
MUXMODE
L
A_DELAY G_DELAY A_DELAY G_DELAY
0
1
2
3
4
(ps)
(ps)
(ps)
(ps)
F6
vin2a_d11
1622
0
1702
0
CFG_VIN2A_D11_IN
vin2a_d11
-
-
-
-
D5 vin2a_d12
1350
412
1819
0
CFG_VIN2A_D12_IN
vin2a_d12
-
-
-
-
C2 vin2a_d13
1613
147
1476
260
CFG_VIN2A_D13_IN
vin2a_d13
-
-
-
-
C3 vin2a_d14
1149
516
1701
0
CFG_VIN2A_D14_IN
vin2a_d14
-
-
-
-
C4 vin2a_d15
1530
450
2021
0
CFG_VIN2A_D15_IN
vin2a_d15
-
-
-
-
B2
vin2a_d16
1512
449
2044
11
CFG_VIN2A_D16_IN
vin2a_d16
-
vin2b_d7
-
-
D6 vin2a_d17
1293
488
1839
5
CFG_VIN2A_D17_IN
vin2a_d17
-
vin2b_d6
-
-
C5 vin2a_d18
2140
371
2494
0
CFG_VIN2A_D18_IN
vin2a_d18
-
vin2b_d5
-
-
A3
vin2a_d19
2041
275
1699
611
CFG_VIN2A_D19_IN
vin2a_d19
-
vin2b_d4
-
-
D1
vin2a_d2
1675
35
1736
0
CFG_VIN2A_D2_IN
vin2a_d2
-
-
-
-
B3
vin2a_d20
1972
441
2412
88
CFG_VIN2A_D20_IN
vin2a_d20
-
vin2b_d3
-
-
B4
vin2a_d21
1957
556
2391
161
CFG_VIN2A_D21_IN
vin2a_d21
-
vin2b_d2
-
-
B5
vin2a_d22
2011
433
2446
102
CFG_VIN2A_D22_IN
vin2a_d22
-
vin2b_d1
-
-
A4
vin2a_d23
1962
523
2395
145
CFG_VIN2A_D23_IN
vin2a_d23
-
vin2b_d0
-
-
E2
vin2a_d3
1457
361
1943
0
CFG_VIN2A_D3_IN
vin2a_d3
-
-
-
-
D2
vin2a_d4
1535
0
1601
0
CFG_VIN2A_D4_IN
vin2a_d4
-
-
-
-
F4
vin2a_d5
1676
271
2052
0
CFG_VIN2A_D5_IN
vin2a_d5
-
-
-
-
C1
vin2a_d6
1513
0
1571
0
CFG_VIN2A_D6_IN
vin2a_d6
-
-
-
-
E4
vin2a_d7
1616
141
1855
0
CFG_VIN2A_D7_IN
vin2a_d7
-
-
-
-
F5
vin2a_d8
1286
437
1224
618
CFG_VIN2A_D8_IN
vin2a_d8
-
-
-
-
E6
vin2a_d9
1544
265
1373
509
CFG_VIN2A_D9_IN
vin2a_d9
-
-
-
-
G2 vin2a_de0
1732
208
1949
0
CFG_VIN2A_DE0_IN
vin2a_de0 vin2a_fld0 vin2b_fld1 vin2b_de1
-
H7
vin2a_fld0
1461
562
1983
151
CFG_VIN2A_FLD0_IN
vin2a_fld0
-
vin2b_clk1
-
-
G1 vin2a_hsync0
1877
0
1943
0
CFG_VIN2A_HSYNC0_IN vin2a_hsync
-
0
-
vin2b_hsync
-
1
G6 vin2a_vsync0
1566
0
1612
0
CFG_VIN2A_VSYNC0_IN vin2a_vsync
-
0
-
vin2b_vsync
-
1
Manual IO Timings Modes must be used to guaranteed some IO timings for VIP1. See Table 7-2 Modes Summary for a list of IO timings requiring
the use of Manual IO Timings Modes. See Table 7-8 Manual Functions Mapping for VIN2B (IOSET1/2/7) for a definition of the Manual modes.
Table 7-8 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
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Timing Requirements and Switching Characteristics 201