English
Language : 

DRA722_17 Datasheet, PDF (193/408 Pages) Texas Instruments – Infotainment Applications Processor
www.ti.com
V2
vinx_clki
vinx_clki
(positive-edge clocking)
vinx_clki
(negative-edge clocking)
vinx_d[23:0]/sig
DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
V3
V1
Figure 7-4. Video Input Ports clock signal
SPRS906_TIMING_VIP_01
V5
V4
Figure 7-5. Video Input Ports timings
SPRS8xx_VIP_02
Copyright © 2016–2017, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics 193
Submit Documentation Feedback
Product Folder Links: DRA722 DRA724 DRA725 DRA726