DRA722_17 Datasheet, PDF (339/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
NOTE
To ensure normal behavior of the ESD protection (unwanted leakage), it is better to ground
the ESD protection to the board ground rather than any local ground (example isolated shield
or audio ground).
8.2.5.2 Miscellaneous EMC Guidelines to Mitigate ESD Immunity
• Avoid running critical signal traces (clocks, resets, interrupts, control signals, and so forth) near PCB
edges.
• Add high frequency filtering: Decoupling capacitors close to the receivers rather than close to the
drivers to minimize ESD coupling.
• Put a ground (guard) ring around the entire periphery of the PCB to act as a lightning rod.
• Connect the guard ring to the PCB ground plane to provide a low impedance path for ESD-coupled
current on the ring.
• Fill unused portions of the PCB with ground plane.
• Minimize circuit loops between power and ground by using multilayer PCB with dedicated power and
ground planes.
• Shield long line length (strip lines) to minimize radiated ESD.
• Avoid running traces over split ground planes. It is better to use a bridge connecting the two planes in
one area.
BAD
BETTER
SPRS906_PCB_EMC_01
Figure 8-11. Trace Examples
• Always route signal traces and their associated ground returns as close to one another as possible to
minimize the loop area enclosed by current flow:
– At high frequencies current follows the path of least inductance.
– At low frequencies current flows through the path of least resistance.
8.2.5.3 ESD Protection System Design Consideration
ESD protection system design consideration is covered in Section 8.5.2.2 of this document. The following
are additional considerations for ESD protection in a system.
• Metallic shielding for both ESD and EMI
• Chassis GND isolation from the board GND
• Air gap designed on board to absorb ESD energy
• Clamping diodes to absorb ESD energy
• Capacitors to divert ESD energy
• The use of external ESD components on the DP/DM lines may affect signal quality and are not
recommended.
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Applications, Implementation, and Layout 339
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