DRA722_17 Datasheet, PDF (109/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
SIGNAL NAME
mii1_txd3
mii1_txer
mii1_rxer
mii1_col
mii1_crs
mii1_txen
mii0_rxd1
mii0_rxd2
mii0_rxd3
mii0_rxd0
mii0_rxclk
mii0_rxdv
mii0_txclk
mii0_txd0
mii0_txd1
mii0_txd2
mii0_txd3
mii0_txer
mii0_rxer
mii0_col
mii0_crs
mii0_txen
rmii1_crs
rmii1_rxer
rmii1_rxd1
rmii1_rxd0
rmii1_txen
rmii1_txd1
rmii1_txd0
rmii0_crs
rmii0_rxer
rmii0_rxd1
rmii0_rxd0
rmii0_txen
rmii0_txd1
rmii0_txd0
mdio_mclk
mdio_d
Table 4-21. GMAC Signal Descriptions (continued)
DESCRIPTION
MII1 Transmit Data
MII1 Transmit Error
MII1 Receive Data Error
MII1 Collision Detect (Sense)
MII1 Carrier Sense
MII1 Transmit Data Enable
MII0 Receive Data
MII0 Receive Data
MII0 Receive Data
MII0 Receive Data
MII0 Receive Clock
MII0 Receive Data Valid
MII0 Transmit Clock
MII0 Transmit Data
MII0 Transmit Data
MII0 Transmit Data
MII0 Transmit Data
MII0 Transmit Error
MII0 Receive Data Error
MII0 Collision Detect (Sense)
MII0 Carrier Sense
MII0 Transmit Data Enable
RMII1 Carrier Sense
RMII1 Receive Data Error
RMII1 Receive Data
RMII1 Receive Data
RMII1 Transmit Data Enable
RMII1 Transmit Data
RMII1 Transmit Data
RMII0 Carrier Sense
RMII0 Receive Data Error
RMII0 Receive Data
RMII0 Receive Data
RMII0 Transmit Data Enable
RMII0 Transmit Data
RMII0 Transmit Data
Management Data Serial Clock
Management Data
TYPE
O
I
I
I
I
O
I
I
I
I
I
I
I
O
O
O
O
I
I
I
I
O
I
I
I
I
O
O
O
I
I
I
I
O
O
O
O
IO
BALL
C5
A3
B3
B4
B5
A4
V6
V9
W9
U6
Y1
V2
U5
W2
Y2
V4
V5
U4
U7
V1
V7
V3
V2
Y1
W9
V9
U5
V5
V4
V7
U7
V6
U6
V3
Y2
W2
AC5 / V1 / B21 / D3
AB4 / U4 / B20 / F6
4.4.19 Media Local Bus (MLB) Interface
NOTE
FMLB in 6-pin mode may require pull ups/ downs on SIG and DAT bus signals.
For additional details, please consult the MLB bus interface specification.
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Terminal Configuration and Functions 109
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