DRA722_17 Datasheet, PDF (119/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
4.4.26 System and Miscellaneous
4.4.26.1 Sysboot
NOTE
For more information, see the Initialization (ROM Code) section of the device TRM.
Table 4-29. Sysboot Signal Descriptions
SIGNAL NAME
sysboot0
sysboot1
sysboot2
sysboot3
sysboot4
sysboot5
sysboot6
sysboot7
sysboot8
sysboot9
sysboot10
sysboot11
sysboot12
sysboot13
sysboot14
sysboot15
DESCRIPTION
Boot Mode Configuration 0. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 1. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 2. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 3. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 4. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 5. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 6. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 7. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 8. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 9. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 10. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 11. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 12. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 13. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 14. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 15. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
4.4.26.2 Power, Reset, and Clock Management (PRCM)
TYPE
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
NOTE
For more information, see PRCM section of the device TRM.
BALL
M6
M2
L5
M1
L6
L4
L3
L2
L1
K2
J1
J2
H1
J3
H2
H3
Table 4-30. PRCM Signal Descriptions
SIGNAL NAME
clkout1
DESCRIPTION
Device Clock output 1. Can be used externally for devices with non-
critical timing requirements, or for debug, or as a reference clock on
GPMC as described in Table 7-23 GPMC/NOR Flash Interface
Switching Characteristics - Synchronous Mode - Default and Table 7-
25 GPMC/NOR Flash Interface Switching Characteristics -
Synchronous Mode - Alternate.
TYPE
O
BALL
F21 / P7
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Terminal Configuration and Functions 119
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