DRA722_17 Datasheet, PDF (79/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Table 4-3. Multiplexing Characteristics (continued)
ADDRESS REGISTER NAME
BALL
NUMBER
0
1
2
0x14D0
CTRL_CORE_PAD_ N6
GPMC_BEN0
gpmc_ben0 gpmc_cs4
0x14D4
CTRL_CORE_PAD_ M4
GPMC_BEN1
gpmc_ben1 gpmc_cs5
0x14D8
CTRL_CORE_PAD_ N2
GPMC_WAIT0
gpmc_wait0
MUXMODE FIELD SETTINGS (CTRL_CORE_PAD_*[3:0])
3*
4*
5*
6*
7
8*
vin2b_de1
vin1b_de1
timer2
vin2b_clk1
vin1b_clk1
gpmc_a3
vin2b_fld1
vin1b_fld1
timer1
9
dma_evt3
dma_evt4
0x1554
CTRL_CORE_PAD_V E1
IN2A_CLK0
vin2a_clk0
vout2_fld
emu5
kbd_row0
0x1558
0x155C
CTRL_CORE_PAD_V G2
IN2A_DE0
CTRL_CORE_PAD_V H7
IN2A_FLD0
vin2a_de0 vin2a_fld0 vin2b_fld1 vin2b_de1 vout2_de
vin2a_fld0
vin2b_clk1
vout2_clk
emu6
emu7
kbd_row1
0x1560
0x1564
0x1568
0x156C
0x1570
0x1574
0x1578
0x157C
0x1580
0x1584
0x1588
0x158C
0x1590
0x1594
0x1598
0x159C
CTRL_CORE_PAD_V G1
IN2A_HSYNC0
CTRL_CORE_PAD_V G6
IN2A_VSYNC0
CTRL_CORE_PAD_V F2
IN2A_D0
CTRL_CORE_PAD_V F3
IN2A_D1
CTRL_CORE_PAD_V D1
IN2A_D2
CTRL_CORE_PAD_V E2
IN2A_D3
CTRL_CORE_PAD_V D2
IN2A_D4
CTRL_CORE_PAD_V F4
IN2A_D5
CTRL_CORE_PAD_V C1
IN2A_D6
CTRL_CORE_PAD_V E4
IN2A_D7
CTRL_CORE_PAD_V F5
IN2A_D8
CTRL_CORE_PAD_V E6
IN2A_D9
CTRL_CORE_PAD_V D3
IN2A_D10
CTRL_CORE_PAD_V F6
IN2A_D11
CTRL_CORE_PAD_V D5
IN2A_D12
CTRL_CORE_PAD_V C2
IN2A_D13
vin2a_hsync0
vin2a_vsync0
vin2a_d0
vin2a_d1
vin2a_d2
vin2a_d3
vin2a_d4
vin2a_d5
vin2a_d6
vin2a_d7
vin2a_d8
vin2a_d9
vin2a_d10
vin2a_d11
vin2a_d12
vin2a_d13
vin2b_hsync1 vout2_hsync emu8
vin2b_vsync1 vout2_vsync emu9
vout2_d23 emu10
vout2_d22 emu11
vout2_d21 emu12
vout2_d20 emu13
vout2_d19 emu14
vout2_d18 emu15
vout2_d17 emu16
vout2_d16 emu17
vout2_d15 emu18
vout2_d14 emu19
mdio_mclk vout2_d13
mdio_d
vout2_d12
rgmii1_txc vout2_d11
rgmii1_txctl vout2_d10
uart9_rxd
spi4_sclk
kbd_row2
uart9_txd
spi4_d1
kbd_row3
uart9_ctsn spi4_d0
kbd_row4
uart9_rtsn spi4_cs0
kbd_row5
uart10_rxd kbd_row6
uart10_txd kbd_col0
uart10_ctsn kbd_col1
uart10_rtsn kbd_col2
mii1_rxd1 kbd_col3
mii1_rxd2 kbd_col4
mii1_rxd3 kbd_col5
mii1_rxd0 kbd_col6
kbd_col7
kbd_row7
mii1_rxclk kbd_col8
mii1_rxdv
kbd_row8
10
eQEP1A_in
eQEP1B_in
14*
gpio2_26
gpmc_a21
gpio2_27
gpmc_a22
gpio2_28
gpmc_a25
gpmc_a15
gpio3_28
gpmc_a27
gpmc_a17
gpio3_29
15
Driver off
Driver off
Driver off
Driver off
Driver off
eQEP1_index gpio3_30
gpmc_a27
gpmc_a18
eQEP1_strob gpio3_31
e
gpmc_a27
ehrpwm1A gpio4_0
Driver off
Driver off
Driver off
ehrpwm1B gpio4_1
Driver off
ehrpwm1_trip gpio4_2
zone_input
eCAP1_in_P gpio4_3
WM1_out
ehrpwm1_syn gpio4_4
ci
ehrpwm1_syn gpio4_5
co
eQEP2A_in gpio4_6
Driver off
Driver off
Driver off
Driver off
Driver off
eQEP2B_in gpio4_7
Driver off
eQEP2_index gpio4_8
Driver off
eQEP2_strob gpio4_9
e
gpmc_a26
ehrpwm2A
gpio4_10
gpmc_a25
ehrpwm2B
gpio4_11
gpmc_a24
ehrpwm2_trip gpio4_12
zone_input gpmc_a23
eCAP2_in_P gpio4_13
WM2_out
eQEP3A_in gpio4_14
Driver off
Driver off
Driver off
Driver off
Driver off
Driver off
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Terminal Configuration and Functions
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