HD64F3437TF16 Datasheet, PDF (81/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Bus cycle
T₁ state
T₂ state
ø
Internal address bus
Internal read signal
Internal data bus (read)
Address
Read data
Internal write signal
Internal data bus (write)
Write data
Figure 2.13 On-Chip Memory Access Cycle
Bus cycle
T₁ state
T₂ state
ø
Address bus
Address
AS: High
RD: High
WR: High
Data bus:
high impedance state
Figure 2.14 Pin States during On-Chip Memory Access Cycle
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