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HD64F3437TF16 Datasheet, PDF (530/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.
21.1.3 Block Diagram
Figure 21.1 shows a block diagram of the flash memory.
8
8
FLMCR1
FLMCR2
Internal data bus (upper)
Internal data bus (lower)
Bus interface and control section
EBR2
H'0000
H'0001
H'0002
H'0003
H'0004
H'0005
On-chip flash memory
(60 kbytes)
H'F77C
H'F77E
H'F77D
H'F77F
Upper byte
(even address)
Lower byte
(odd address)
Legend:
FLMCR1:
FLMCR2:
EBR2:
Flash memory control register 1
Flash memory control register 2
Erase block register 2
Figure 21.1 Flash Memory Block Diagram
Operating MD1
mode
MD0
501