HD64F3437TF16 Datasheet, PDF (40/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Pin No.
Expanded Modes
FP-100B,
TFP-100B Mode 1
Mode 2
Single-Chip Mode
Mode 3
HIF Disabled HIF Enabled
Flash
EPROM Memory
Writer Writer
Mode Mode
97
P8₄/IRQ₃/TxD₁ when HIF is disabled or STAC bit is 1 in STCR; NC
NC
IOW/IRQ₃ when HIF is enabled and STAC bit is 0 in STCR
98
P8₅/IRQ₄/RxD₁ when HIF is disabled or STAC bit is 1 in STCR; NC
NC
CS₂/IRQ₄ when HIF is enabled and STAC bit is 0 in STCR
99
P8₆/SCK₁/
P8₆/SCK₁/
P8₆/SCK₁/
P8₆/SCK₁/
NC
NC
IRQ₅/SCL
IRQ₅/SCL
IRQ₅/SCL
IRQ₅/SCL
100
RESO
RESO
RESO
RESO
NC
NC
Note:
Pins marked NC should be left unconnected.
For details on writer mode, refer to 18.2, Writer Mode, 19.6, Flash Memory Writer Mode
(H8/3434F), 20.6, Flash Memory Writer Mode (H8/3437F) and 21.5, Flash Memory Writer
Mode (H8/3437SF).
In this chip, except for the S-mask model (single-power-supply specification), the same pin
is used for STBY and FV_PP. When this pin is driven low, a transition is made to hardware
standby mode. This occurs not only in the normal operating modes (modes 1, 2, and 3), but
also when programming flash memory with a PROM writer. When using a PROM
programmer to program dual-power-supply flash memory, therefore, the PROM
programmer specifications should provide for this pin to be held at the V_CC level except
when programming (FV_PP = 12 V).
*1 Differs as in mode 3, depending on whether the host interface is enabled or disabled.
*2 XDB₇ to XDB₆ can only be used when the host interface is enabled.
11