HD64F3437TF16 Datasheet, PDF (615/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Table 23.20 Bus Timing
Conditions: V_CC = 3.0 V to 5.5 V, V_CCB = 3.0 V to 5.5 V, V_SS = 0 V, ø = 2.0 MHz to maximum
operating frequency, Ta = –20 to +75˚C (regular specifications), Ta = –40 to +85˚C
(wide-range specifications)
Condition
10MHz
Item
Symbol Min
Max
Clock cycle time
t _cyc
100
500
Clock pulse width low
t _CL
30
—
Clock pulse width high
t _CH
30
—
Clock rise time
t _Cr
—
20
Clock fall time
t _Cf
—
20
Address delay time
t _AD
—
50
Address hold time
t _AH
20
—
Address strobe delay time
t _ASD
—
50
Write strobe delay time
t _WSD
—
50
Strobe delay time
t _SD
—
50
Write strobe pulse width*
t _WSW
110
—
Address setup time 1*
t _AS1
15
—
Address setup time 2*
t _AS2
65
—
Read data setup time
t _RDS
35
—
Read data hold time*
t _RDH
0
—
Read data access time*
t _ACC
—
170
Write data delay time
t _WDD
—
75
Write data setup time
t _WDS
5
—
Write data hold time
t _WDH
20
—
Wait setup time
t _WTS
40
—
Wait hold time
t _WTH
10
—
Note: * Values at maximum operating frequency
Unit Test Conditions
ns Fig. 23.7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns Fig. 23.8
ns
586