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HD64F3437TF16 Datasheet, PDF (620/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device. | |||
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Table 23.24 External Clock Output Stabilization Delay Time
Conditions: VCC = 3.0 V to 5.5 V, AVCC = 3.0 V to 5.5 V, VSS = AVSS = 0 V,
Ta = â40°C to +85°C
Item
Symbol Min
External clock output stabilization
t * DEXT
500
delay time
Note: * tDEXT includes a 10 tcyc RES pulse width (tRESW).
Max Unit Notes
â
µs
Figure 23.26
23.4.3 A/D Converter Characteristics
Table 23.25 lists the characteristics of the on-chip A/D converter.
Table 23.25 A/D Converter Characteristics
Conditions: VCC = 3.0 V to 5.5 V, VCCB = 3.0 V to 5.5 V, AVCC = 3.0 V to 5.5 V,
AVref = 3.0 V to AVCC, VSS = AVSS = 0 V, ø = 2.0 MHz to maximum operating
frequency, Ta = â20 to +75ËC (regular specifications), Ta = â40 to +85ËC (wide-
range specifications)
Item
Min
Resolution
10
Conversion (single mode)*
â
Analog input capacitance
â
Allowable signal source impedance
â
Nonlinearity error
â
Offset error
â
Full-scale error
â
Quantizing error
â
Absolute accuracy
â
Note: * Values at maximum operating frequency
Condition
10 MHz
Typ
Max
Unit
10
10
Bits
â
13.4
µs
â
20
pF
â
5
kâ¦
â
±6.0
LSB
â
±4.0
LSB
â
±4.0
LSB
â
±0.5
LSB
â
±8.0
LSB
591
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