HD64F3437TF16 Datasheet, PDF (237/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

9.6.4 Contention between Compare-Match A and Compare-Match B
If identical time constants are written in TCORA and TCORB, causing compare-match A and B to
occur simultaneously, any conflict between the output selections for compare-match A and B is
resolved by following the priority order in table 9.4.
Table 9.4 Priority of Timer Output
Output Selection
Toggle
1 output
0 output
No change
Priority
High
Low
9.6.5 Increment Caused by Changing of Internal Clock Source
When an internal clock source is changed, the changeover may cause the timer counter to
increment. This depends on the time at which the clock select bits (CKS1, CKS0) are rewritten, as
shown in table 9.5.
The pulse that increments the timer counter is generated at the falling edge of the internal clock
source signal. If clock sources are changed when the old source is high and the new source is low,
as in case no. 3 in table 9.5, the changeover generates a falling edge that triggers the TCNT clock
pulse and increments the timer counter.
Switching between an internal and external clock source can also cause the timer counter to
increment.
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