HD64F3437TF16 Datasheet, PDF (276/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Table 12.3 Examples of BRR Settings in Asynchronous Mode (When ø_P = ø)
Bit Rate
(bits/s)
110
150
300
600
1200
2400
4800
9600
19200
31250
38400
ø (MHz)
2
2.097152
nN
Error
(%)
nN
Error
(%)
1 141 +0.03 1 148 –0.04
1 103 +0.16 1 108 +0.21
0 207 +0.16 0 217 +0.21
0 103 +0.16 0 108 +0.21
0 51 +0.16 0 54 –0.70
0 25 +0.16 0 26 +1.14
0 12 +0.16 0 13 –2.48
—— —
0 6 –2.48
—— —
—— —
01 0
—— —
—— —
—— —
ø (MHz)
2.4576
3
Bit Rate
(bits/s) n N
Error
(%)
nN
Error
(%)
n
110
1 174 –0.26 2 52 +0.50 2
150
1 127 0
1 155 +0.16 1
300
0 255 0
1 77 +0.16 1
600
0 127 0
0 155 +0.16 0
1200
0 63 0
0 77 +0.16 0
2400
0 31 0
0 38 +0.16 0
4800
0 15 0
0 19 –2.34 0
9600
07 0
0 9 –2.34 0
19200
03 0
0 4 –2.34 0
31250
—— —
02 0
—
38400
01 0
—— —
0
Note: If possible, the error should be within 1%.
3.6864
Error
N (%)
64 +0.70
191 0
95 0
191 0
95 0
47 0
23 0
11 0
50
——
20
4
nN
Error
(%)
2 70 +0.03
1 207 +0.16
1 103 +0.16
0 207 +0.16
0 103 +0.16
0 51 +0.16
0 25 +0.16
0 12 +0.16
—— —
03 0
—— —
247