HD64F3437TF16 Datasheet, PDF (293/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Transmitting Serial Data: Follow the procedure in figure 12.5 for transmitting serial data.
1
Initialize
Start transmitting
2
Read TDRE bit in SSR
No
TDRE = 1?
Yes
Write transmit data in TDR
If using multiprocessor format,
select MPBT value in SSR
Clear TDRE bit to 0
Serial transmission
End of
No
3
transmission?
Yes
Read TEND bit in SSR
No
TEND = 1?
Yes
4
Output break
No
signal?
Yes
Set DR = 0, DDR = 1
Clear TE bit in SCR to 0
1.
SCI initialization: the transmit data output function
of the TxD pin is selected automatically.
After the TE bit is set to 1, one frame of 1s is output,
then transmission is possible.
2.
SCI status check and transmit data write: read
the serial status register (SSR), check that the
TDRE bit is 1, then write transmit data in the
transmit data register (TDR) and clear TDRE to 0.
If a multiprocessor format is selected, after
writing the transmit data write 0 or 1 in the
multiprocessor bit transfer (MPBT) in SSR.
Transition of the TDRE bit from 0 to 1 can be
reported by an interrupt.
3. (a)
(b)
To continue transmitting serial data: read the
TDRE bit to check whether it is safe to write; if
TDRE = 1, write data in TDR, then clear TDRE
to 0.
To end serial transmission: end of transmission
can be confirmed by checking transition of the
TEND bit from 0 to 1. This can be reported by
a TEI interrupt.
4.
To output a break signal at the end of serial
transmission: set the DDR bit to 1 and clear the
DR bit to 0 (DDR and DR are I/O port registers),
then clear TE to 0 in SCR.
End
Figure 12.5 Sample Flowchart for Transmitting Serial Data
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