HD64F3437TF16 Datasheet, PDF (701/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

RDR—Receive Data Register
H'DD
SCI0
Bit
7
6
5
4
3
2
1
0
Initial value
0
0
0
0
0
0
0
0
Read/Write
R
R
R
R
R
R
R
R
Receive data
Note: Bit functions are the same as for SCI1.
ICDR—I²C Bus Data Register
H'DE
I²C
Bit
Initial value
Read/Write
7
ICDR7
—
R/W
6
ICDR6
—
R/W
5
ICDR5
—
R/W
4
ICDR4
—
R/W
3
ICDR3
—
R/W
2
ICDR2
—
R/W
1
ICDR1
—
R/W
0
ICDR0
—
R/W
Transmit/receive data
SAR—Slave Address Register
H'DF
I²C
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
SVA6 SVA5 SVA4 SVA3 SVA2 SVA1 SVA0 FS
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Slave address
Format Select
0 Addressing format, slave address recognized
1 Non-addressing format
672