HD64F3437TF16 Datasheet, PDF (572/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Section 22 Power-Down State
22.1 Overview
The H8/3437 Series has a power-down state that greatly reduces power consumption by stopping
some or all of the chip functions. The power-down state includes three modes:
1. Sleep mode
2. Software standby mode
3. Hardware standby mode
Table 22.1 lists the conditions for entering and leaving the power-down modes. It also indicates
the status of the CPU, on-chip supporting modules, etc. in each power-down mode.
Table 22.1 Power-Down State
Mode
Sleep
mode
Entering
Procedure
Execute
SLEEP
instruction
Clock CPU
Run Halt
CPU
Reg’s.
Held
Sup.
Mod.
Run
I/O
RAM Ports
Held Held
Software Set SSBY bit Halt Halt Held
standby in SYSCR to
mode
1, then
execute
SLEEP
instruction
Halt and Held Held
initialized
Hardware Set STBY
standby pin to low
mode
level
Halt Halt Not
held
Notes: 1. SYSCR: System control register
2. SSBY: Software standby bit
Halt and Held
initialized
High
impe-
dance
state
Exiting
Methods
• Interrupt
• RES
• STBY
• NMI
• IRQ₀–IRQ₂
IRQ₆ (incl.
KEYIN₀–
KEYIN₁₅)
• RES
• STBY
• STBY and
RES
543