HD64F3437TF16 Datasheet, PDF (603/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Table 23.12 External Clock Output Stabilization Delay Time
Conditions: V_CC = 2.7 V to 5.5 V^*2, AV_CC = 2.7 V to 5.5 V^*2, V_SS = AV_SS = 0 V, Ta = –40°C to
+85°C
Item
Symbol Min
Max Unit Notes
External clock output stabilization
t *1
DEXT
500
—
µs
Figure 23.26
delay time
Notes: *1 t_DEXT includes a 10 t_cyc RES pulse width (t_RESW).
*2 In the F-ZTAT LH version, V_CC = 3.0 V to 5.5 V, AV_CC = 3.0 V to 5.5 V.
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