HD64F3437TF16 Datasheet, PDF (167/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Port 8 Data Direction Register (P8DDR)
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
—
P8₆DDR P8₅DDR P8₄DDR P8₃DDR P8₂DDR P8₁DDR P8₀DDR
1
0
0
0
0
0
0
0
—
W
W
W
W
W
W
W
P8DDR is an 8-bit register that controls the input/output direction of each pin in port 8. A pin
functions as an output pin if the corresponding P8DDR bit is set to 1, and as an input pin if this bit
is cleared to 0. P8DDR is a write-only register. Read data is invalid. If read, all bits always read 1.
Bit 7 is a reserved bit that always reads 1.
P8DDR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode
P8DDR retains its existing values, so if a transition to software standby mode occurs while a
P8DDR bit is set to 1, the corresponding pin remains in the output state.
Port 8 Data Register (P8DR)
Bit
7
—
Initial value
1
Read/Write
—
6
P8₆
0
R/W
5
P8₅
0
R/W
4
P8₄
0
R/W
3
P8₃
0
R/W
2
P8₂
0
R/W
1
P8₁
0
R/W
0
P8₀
0
R/W
P8DR is an 8-bit register that stores data for pins P8₆ to P8₀. Bit 7 is a reserved bit that always
reads 1.
When a P8DDR bit is set to 1, if port 8 is read, the value in P8DR is obtained directly, regardless
of the actual pin state. When a P8DDR bit is cleared to 0, if port 8 is read the pin state is obtained.
This also applies to pins used by on-chip supporting modules.
P8DR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode it
retains its existing values.
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