HD64F3437TF16 Datasheet, PDF (265/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

12.1.4 Register Configuration
Table 12.2 lists the SCI registers. These registers specify the operating mode (synchronous or
asynchronous), data format and bit rate, and control the transmit and receive sections.
Table 12.2 SCI Registers
Channel Name
Abbreviation R/W
Initial
Value
Address
0
Receive shift register
RSR
—^{* 1}
—^{* 1}
—^{* 1}
Receive data register
RDR
R
H'00
H'FFDD
Transmit shift register
TSR
—^{* 1}
—^{* 1}
—^{* 1}
Transmit data register
TDR
R/W
H'FF
H'FFDB
Serial mode register
SMR^*3
R/W
H'00
H'FFD8
Serial control register
SCR
R/W
H'00
H'FFDA
Serial status register
SSR
R/(W) ^*2 H'84
H'FFDC
Bit rate register
BRR^*3
R/W
H'FF
H'FFD9
1
Receive shift register
RSR
—^{* 1}
—^{* 1}
—^{* 1}
Receive data register
RDR
R
H'00
H'FF8D
Transmit shift register
TSR
—^{* 1}
—^{* 1}
—^{* 1}
Transmit data register
TDR
R/W
H'FF
H'FF8B
Serial mode register
SMR
R/W
H'00
H'FF88
Serial control register
SCR
R/W
H'00
H'FF8A
Serial status register
SSR
R/(W) ^*2 H'84
H'FF8C
Bit rate register
BRR
R/W
H'FF
H'FF89
0 and 1 Serial/timer control register STCR
R/W
H'00
H'FFC3
Notes: *1 Cannot be read or written to.
*2 Software can write a 0 to clear the flags in bits 7 to 3, but cannot write 1 in these bits.
*3 SMR and BRR have the same addresses as I²C bus interface registers ICCR and
ICSR. For the access switching method and other details, see section 13, I²C Bus
Interface.
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