HD64F3437TF16 Datasheet, PDF (379/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

15.5 Interrupts
The A/D converter generates an interrupt (ADI) at the end of A/D conversion. The ADI interrupt
request can be enabled or disabled by the ADIE bit in ADCSR.
15.6 Application Notes
When using the A/D converter, note the following points.
Setting Ranges of Analog Power Supply and Other Pins:
1. Analog Input Voltage Range
During A/D conversion, the voltages input to the analog input pins AN_n should be in the range
AV_SS ≤ AN_n ≤ AV_ref. (n = 0 to 7)
2. AV_CC and AV_SS Input Voltages
AV_SS should be equal to V_SS. If the A/D converter is not used, the values should be AV_CC = V_CC
and AV_SS = V_SS
3. AV_ref Input Range
The analog reference voltage input at the AV_ref pin should be in the range AV_ref ≤ AV_CC. If the
A/D converter is not used, the value should be AV_ref = V_CC.
Notes on Board Design: In board design, digital circuitry and analog circuitry should be as
mutually isolated as possible, and layout in which digital circuit signal lines and analog circuit
signal lines cross or are in close proximity should be avoided as far as possible. Failure to do so
may result in incorrect operation of the analog circuitry due to inductance, adversely affecting A/D
conversion values.
Also, digital circuitry must be isolated from the analog input signals (AN₀ to AN₇), analog
reference voltage (AV_ref), and analog power supply (AV_CC) by the analog ground (AV_SS). The
analog ground (AV_SS) should be connected to a stable digital ground (V_SS) at one point on the
board.
Notes on Noise Countermeasures: A protection circuit connected to prevent damage due to an
abnormal voltage such as an excessive surge at the analog input pins (AN₀ to AN₇) or analog
reference power supply pin (AV_ref) should be connected between AV_CC and AV_SS as shown in
figure 15.7.
Also, the bypass capacitors connected to AV_CC, AV_ref and the filter capacitor connected to AN₀ to
AN₇ must be connected to AV_SS.
If a filter capacitor is connected as shown in figure 15.7, the input currents at the analog input pins
(AN₀ to AN₇) are averaged, and so an error may arise. Also, when A/D conversion is performed
frequently, as in scan mode, if the current charged and discharged by the capacitance of the
sample-and-hold circuit in the A/D converter exceeds the current input via the input impedance
350