HD64F3437TF16 Datasheet, PDF (554/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

21.4.5 Protect Modes
There are three modes for protecting flash memory from programming and erasing: software
protection, hardware protection, and error protection. These protection modes are described below.
Software Protection: Software protection can be implemented by setting the SWE bit in flash
memory control register 1 (FLMCR1), and setting erase block register 2 (EBR2). Software
protection prevents transitions to program mode and erase mode even if the P or E bit is set in
FLMCR1.
Details of software protection are shown in table 21.8.
Table 21.8 Software Protection
Item
SWE bit protect
Block protect
Description
Clearing the SWE bit to 0 in FLMCR1 sets the
program/erase-protected state for all blocks.
(Execute in on-chip RAM or external memory.)
Individual blocks can be protected from erasing
and programming by erase block register 2
(EBR2). If H'00 is set in EBR2, all blocks are
protected from erasing and programming.
Functions
Program Erase
Yes
Yes
—
Yes
Hardware Protection: Hardware protection refers to a state in which programming and erasing of
flash memory is forcibly suspended or disabled. At this time, the flash memory control registers 1
and 2 (FLMCR1, FLMCR2) and erase block register 2 (EBR2) settings are reset.
Details of hardware protection are shown in table 21.9.
Table 21.9 Hardware Protection
Item
Reset and
standby protect
Functions
Description
Program Erase
When a reset occurs (including a watchdog timer Yes
Yes
reset) or standby mode is entered, FLMCR1,
FLMCR2, and EBR2 are initialized, disabling
programming and erasing. Note that RES input
does not ensure a reset unless the RES pin is
held low until the oscillator settles at power-up, or
for a period equivalent to the RES pulse width
specified in the AC characteristics during
operation.
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