HD64F3437TF16 Datasheet, PDF (71/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

BSET, BCLR, BNOT, BTST
15
87
0
op
IMM
rn
Operand: register direct (Rn)
Bit no.: immediate (#xx:3)
15
op
87
rm
0
rn
Operand: register direct (Rn)
Bit no.: register direct (Rm)
15
op
87
rn
0
0 0 0 0 Operand: register indirect (@Rn)
op
IMM
0 0 0 0 _{Bit no.: immediate (#xx:3)}
15
op
op
87
rn
rm
0
0 0 0 0 Operand: register indirect (@Rn)
0 0 0 0 _{Bit no.: register direct (Rm)}
15
op
87
0
abs
Operand: absolute (@aa:8)
op
IMM
0 0 0 0 _{Bit no.: immediate (#xx:3)}
15
op
op
87
0
abs
Operand: absolute (@aa:8)
rm
0 0 0 0 _{Bit no.: register direct (Rm)}
BAND, BOR, BXOR, BLD, BST
15
87
0
op
IMM
rn
Operand: register direct (Rn)
Bit no.: immediate (#xx:3)
15
op
87
rn
0
0 0 0 0 Operand: register indirect (@Rn)
op
IMM
0 0 0 0 _{Bit no.: immediate (#xx:3)}
15
op
87
0
abs
Operand: absolute (@aa:8)
op
IMM
0 0 0 0 _{Bit no.: immediate (#xx:3)}
Legend:
op: Operation field
rm, rn: Register field
abs: Absolute address
IMM: Immediate data
Figure 2.7 Bit Manipulation Instruction Codes
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