HD64F3437TF16 Datasheet, PDF (170/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

7.10 Port 9
7.10.1 Overview
Port 9 is an 8-bit input/output port that is multiplexed with interrupt input pins (IRQ₀ to IRQ₂),
input/output pins for bus control signals (RD, WR, AS, WAIT), an input pin (ADTRG) for the
A/D converter, an output pin (ø) for the system clock, host interface (HIF) input pins (ECS₂,
EIOW), and the I²C data input/output pin (SDA). Figure 7.17 shows the pin configuration of port
9. The functions of pins P9₁ and P9₀ are configured according to bit STAC in STCR. Pins P9₇ to
P9₂ are unaffected by bit STAC.
Pins in port 9 can drive one TTL load and a 90-pF capacitive load. They can also drive a
darlington transistor. Pin P9₇ can be driven as a bus buffer, as shown in section 13, I²C Bus
Interface.
Port 9
Port 9 pins
P9₇/WAIT/SDA
P9₆/ø
P9₅/AS
P9₄/WR
P9₃/RD
P9₂/IRQ₀
Pin configuration in mode 1 (expanded mode
with on-chip ROM disabled) and mode 2
(expanded mode with on-chip ROM enabled)
P9₇ (input/output)/WAIT (input)/SDA (input/output)
ø (output)
AS (output)
WR (output)
RD (output)
P9₂ (input/output)/IRQ₀ (input)
Pin configuration in mode 3 (single-chip mode)
P9₇ (input/output)/SDA (input/output)
P9₆ (input)/ø (output)
P9₅ (input/output)
P9₄ (input/output)
P9₃ (input/output)
P9₂ (input/output)/IRQ₀ (input)
Figure 7.17 Port 9 Pin Configuration
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