HD64F3437TF16 Datasheet, PDF (239/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

No. Description
3
High → low^*3
Timing
Old clock
source
4
High → high
New clock
source
TCNT clock
pulse
TCNT
N
Old clock
source
*4
N+1
CKS rewrite
N+2
New clock
source
TCNT clock
pulse
TCNT
N
N+1
N+2
CKS rewrite
Notes: *1 Including a transition from low to the stopped state (CKS1 = 0, CKS0 = 0), or a
transition from the stopped state to low.
*2 Including a transition from the stopped state to high.
*3 Including a transition from high to the stopped state.
*4 The switching of clock sources is regarded as a falling edge, and therefore a TCNT
clock pulse is generated and TCNT is incremented.
210