HD64F3437TF16 Datasheet, PDF (323/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Bit 3—Arbitration Lost (AL): This flag indicates that arbitration was lost in master mode. The
I²C bus interface monitors the bus. When two or more master devices attempt to seize the bus at
nearly the same time, if the I²C bus interface detects data differing from the data it sent, it sets AL
to 1 to indicate that the bus has been taken by another master. At the same time, it sets the IRIC bit
in ICSR to generate an interrupt request.
AL is cleared by reading AL after it has been set to 1, then writing 0 in AL. In addition, AL is
reset automatically by write access to ICDR in transmit mode, or read access to ICDR in receive
mode.
Bit 3: AL
0
1
Description
Bus arbitration won
(Initial value)
This bit is cleared to 0 at the following times:
• When ICDR data is written (transmit mode) or read (receive mode)
• When AL is read while AL = 1, then 0 is written in AL
Arbitration lost
This bit is set to 1 at the following times:
• If the internal SDA signal and bus line disagree at the rise of SCL in master
transmit mode
• If the internal SCL is high at the fall of SCL in master transmit mode
Bit 2—Slave Address Recognition Flag (AAS): When the addressing format is selected (FS = 0)
in slave receive mode, this flag is set to 1 if the first byte following a start condition matches bits
SVA6 to SVA0 in SAR, or if the general call address (H'00) is detected.
AAS is cleared by reading AAS after it has been set to 1, then writing 0 in AAS. In addition, AAS
is reset automatically by write access to ICDR in transmit mode, or read access to ICDR in receive
mode.
Bit 2: AAS
0
1
Description
Slave address or general call address not recognized
(Initial value)
This bit is cleared to 0 at the following times:
• When ICDR data is written (transmit mode) or read (receive mode)
• When AAS is read while AAS = 1, then 0 is written in AAS
Slave address or general call address recognized
This bit is set to 1 at the following times:
• When the slave address or general call address is detected in slave receive
mode
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