HD64F3437TF16 Datasheet, PDF (675/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

TCSR—Timer Control/Status Register
Bit
Initial value
Read/Write
7
OVF
0
R/(W)*
6
WT/IT
0
R/W
5
TME
0
R/W
H'A8
WDT
4
3
2
1
0
— RST/NMI CKS2 CKS1 CKS0
1
0
0
0
0
—
R/W
R/W
R/W
R/W
Clock Select 2 to 0
0 0 0 ø_P/2
1 ø_P/32
1 0 ø_P/64
1 ø_P/128
1 0 0 ø_P/256
1 ø_P/512
1 0 ø_P/2048
1 ø_P/4096
Reset or NMI
0 Functions as NMI (initial value)
1 Functions as reset
Timer Enable
0 Timer disabled: TCNT is initialized to H’00 and
stopped
(initial value)
1 Timer enabled: TCNT runs; CPU interrupts can be
requested
Timer Mode Select
0 Interval timer mode (OVF interrupt request) (initial value)
1 Watchdog timer mode (generates reset or NMI signal)
Overflow Flag
0 Cleared by reading OVF = 1, then writing 0 in OVF (initial value)
1 Set when TCNT changes from H'FF to H'00
Note: * Only 0 can be written, to clear the flag.
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