HD64F3437TF16 Datasheet, PDF (137/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Mode 2: In mode 2 (expanded mode with on-chip ROM enabled), port 1 can provide lower
address output pins and general input pins. Each pin becomes a lower address output pin if its
P1DDR bit is set to 1, and a general input pin if this bit is cleared to 0. Following a reset, all pins
are input pins. To be used for address output, their P1DDR bits must be set to 1. Figure 7.3 shows
the pin functions in mode 2.
Port 1
When P1DDR = 1
A₇ (output)
A₆ (output)
A₅ (output)
A₄ (output)
A₃ (output)
A₂ (output)
A₁ (output)
A₀ (output)
When P1DDR = 0
P1₇ (input)
P1₆ (input)
P1₅ (input)
P1₄ (input)
P1₃ (input)
P1₂ (input)
P1₁ (input)
P1₀ (input)
Figure 7.3 Pin Functions in Mode 2 (Port 1)
Mode 3: In mode 3 (single-chip mode), the input or output direction of each pin can be selected
individually. A pin becomes a general input pin when its P1DDR bit is cleared to 0 and a general
output pin when this bit is set to 1. Figure 7.4 shows the pin functions in mode 3.
Port 1
P1₇ (input/output)
P1₆ (input/output)
P1₅ (input/output)
P1₄ (input/output)
P1₃ (input/output)
P1₂ (input/output)
P1₁ (input/output)
P1₀ (input/output)
Figure 7.4 Pin Functions in Mode 3 (Port 1)
108