HD64F3437TF16 Datasheet, PDF(468/752 Page) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

HD64F3437TF16 Datasheet, PDF (468/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

◁

â¢ Automatic bit-rate alignment

In boot-mode data transfer, the H8/3437F aligns its bit rate automatically to the host bit rate

(maximum 9600 bps).

â¢ Flash memory emulation by RAM

Part of the RAM area can be overlapped onto flash memory, to emulate flash memory updates

in real time.

â¢ Writer mode

As an alternative to on-board programming, the flash memory can be programmed and erased

in writer mode, using a general-purpose PROM programmer. Program, erase, verify, and other

specifications are the same as for HN28F101 standard flash memory.

20.1.4 Block Diagram

Figure 20.1 shows a block diagram of the flash memory.

8

Internal data bus (upper)

8

Internal data bus (lower)

FLMCR

Bus interface and control section

EBR1

EBR2

H'0000

H'0001

H'0002

H'0003

H'0004

H'0005

On-chip flash memory

(60 kbytes)

H'F77C

H'F77D

H'F77E

H'F77F

Upper byte

Lower byte

(even address) (odd address)

Legend:

FLMCR: Flash memory control register

EBR1: Erase block register 1

EBR2: Erase block register 2

Operating

mode

MD1

MD0

Figure 20.1 Flash Memory Block Diagram

439

▷