HD64F3437TF16 Datasheet, PDF (634/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Appendix A CPU Instruction Set
A.1 Instruction Set List
Operation Notation
Rd8/16
Rs8/16
Rn8/16
CCR
N
Z
V
C
PC
SP
#xx:3/8/16
d:8/16
@aa:8/16
+
–
×
÷
∧
∨
⊕
→
—
General register (destination) (8 or 16 bits)
General register (source) (8 or 16 bits)
General register (8 or 16 bits)
Condition code register
N (negative) flag in CCR
Z (zero) flag in CCR
V (overflow) flag in CCR
C (carry) flag in CCR
Program counter
Stack pointer
Immediate data (3, 8, or 16 bits)
Displacement (8 or 16 bits)
Absolute address (8 or 16 bits)
Addition
Subtraction
Multiplication
Division
Logical AND
Logical OR
Exclusive logical OR
Move
NOT (logical complement)
Condition Code Notation
Modified according to the instruction result
*
Undetermined (unpredictable)
0
Always cleared to 0
—
Not affected by the instruction result
605