HD64F3437TF16 Datasheet, PDF (336/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

13.3.8 Sample Flowcharts
Figures 13.12 to 13.15 show typical flowcharts for using the I²C bus interface in each mode.
Start
Initialize
Read BBSY in ICSR
1
No
BBSY = 0?
Yes
Set MST = 1 and
2
TRS = 1 in ICCR
Write BBSY = 1
3
and SCP = 0 in ICSR
Write transmit data in ICDR
4
1. Test the status of the SCL and SDA lines.
2. Select master transmit mode.
3. Generate a start condition.
4. Set transmit data for the first byte (slave address + R/W).
5. Wait for 1 byte to be transmitted.
6. Test for acknowledgement by the designated slave device.
7. Set transmit data for the second and subsequent bytes.
8. Wait for 1 byte to be transmitted.
9. Test for end of transfer.
10. Generate a stop condition.
Read IRIC in ICSR
5
No
IRIC = 1?
Yes
Clear IRIC in ICSR
Read ACKB in ICSR
ACKB = 0?
Yes
Transmit mode?
6
No
No
Master receive mode
Yes
Write transmit data in ICDR
7
Read IRIC in ICSR
8
No
IRIC = 1?
Yes
Clear IRIC in ICSR
Read ACKB in ICSR
9
No
End of transmission
(ACKB = 1)?
Yes
Write BBSY = 0
10
and SCP = 0 in ICSR
End
Figure 13.12 Flowchart for Master Transmit Mode (Example)
307