HD64F3437TF16 Datasheet, PDF (570/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Table 21.22 Area Accessed in Each Mode with FLSHE = 0 and FLSHE = 1
FLSHE = 1
FLSHE = 0
Mode 1
Reserved area
(always H'FF)
External address space
Mode 2
Mode 3
Flash memory control register initial values
FLLMCR1 = H'80
FLMCR2 = H'00
EBR2 = H'00
External address space Reserved area
(always H'FF)
2. When a flash memory control register is accessed in mode 2 (expanded mode with on-chip
ROM enabled)
When a flash memory control register is accessed in mode 2, it can be read or written to if
FLSHE = 1, but if FLSHE = 0, external address space will be accessed. It is therefore essential
to confirm that FLSHE is set to 1 before accessing these registers.
3. To check whether FLSHE = 0 or 1 in mode 3 (single-chip mode)
When address H'FF80 is accessed in mode 3, if FLSHE = 1, FLMCR1 is read/written to, and
its initial value after a reset is H'80. When FLSHE = 0, however, this address is a reserved area
that cannot be modified and always reads H'FF.
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