HD64F3437TF16 Datasheet, PDF (315/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

13.1.3 Input/Output Pins
Table 13.1 summarizes the input/output pins used by the I²C bus interface.
Table 13.1 Wait-State Controller Pins
Name
Serial clock
Serial data
Abbreviation
SCL
SDA
I/O
Input/output
Input/output
Function
Serial clock input/output
Serial data input/output
13.1.4 Register Configuration
Table 13.2 summarizes the registers of the I²C bus interface.
Table 13.2 Register Configuration
Name
Abbreviation R/W
Initial Value Address^*2
I²C bus control register
ICCR
R/W
H'00
H'FFD8
I²C bus status register
ICSR
R/W
H'30
H'FFD9
I²C bus data register
ICDR
R/W
—
H'FFDE
I²C bus mode register
ICMR
R/W
H'38
H'FFDF^*1
Slave address register
SAR
R/W
H'00
H'FFDF^*1
Serial timer control register STCR
R/W
H'00
H'FFC3
Notes: *1 The register that can be written or read depends on the ICE bit in the I²C bus control
register. The slave address register can be accessed when ICE = 0. The I²C bus mode
register can be accessed when ICE = 1.
*2 The addresses assigned to the I²C bus interface registers are also assigned to other
registers. The accessible registers are selected with bit IICE in the serial/timer control
register (STCR).
286