HD64F3437TF16 Datasheet, PDF (72/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

BIAND, BIOR, BIXOR, BILD, BIST
15
87
0
op
IMM
rn
Operand: register direct (Rn)
Bit no.: immediate (#xx:3)
15
87
0
op
rn
0 0 0 0 Operand: register indirect (@Rn)
op
IMM
0 0 0 0 _{Bit no.: immediate (#xx:3)}
15
op
87
0
abs
Operand: absolute (@aa:8)
op
IMM
0 0 0 0 _{Bit no.: immediate (#xx:3)}
Legend:
op: Operation field
rm, rn: Register field
abs: Absolute address
IMM: Immediate data
Figure 2.7 Bit Manipulation Instruction Codes (cont)
43