HD64F3437TF16 Datasheet, PDF (124/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Table 6.4 External Clock Output Stabilization Delay Time
Conditions: V_CC = 2.7 to 5.5 V, AV_CC = 2.7 to 5.5 V, V_SS = AV_SS = 0 V
Item
Symbol
Min
External clock output stabilization
t * _DEXT
500
delay time
Note: * t_DEXT includes a 10 t_cyc RES pulse width (t_RESW).
Max
—
Unit
µs
Notes
Figure 6.7
V_CC 2.7 V
STBY
V_IH
EXTAL
ø (internal and
external)
RES
t_DEXT*
Note: * t_DEXT includes a 10 t_cyc RES pulse width (t_RESW).
Figure 6.7 External Clock Output Stabilization Delay Time
6.2.2 Oscillator Circuit (H8/3437S)
If an external crystal is connected across the EXTAL and XTAL pins, the on-chip oscillator circuit
generates a system clock signal. Alternatively, an external clock signal can be applied to the
EXTAL pin.
Connecting an External Crystal
Circuit Configuration: An external crystal can be connected as in the example in figure 6.8.
Table 6.5 indicates the appropriate damping resistance Rd. An AT-cut parallel resonance crystal
should be used.
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