HD64F3437TF16 Datasheet, PDF (227/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

9.2.5 Serial/Timer Control Register (STCR)
Bit
7
6
5
4
IICS
IICD
IICX
IICE
Initial value
0
0
0
0
Read/Write R/W
R/W
R/W
R/W
3
STAC
0
R/W
2
MPE
0
R/W
1
ICKS1
0
R/W
0
ICKS0
0
R/W
STCR is an 8-bit readable/writable register that controls the I²C bus interface and host interface,
controls the operating mode of the serial communication interface, and selects internal clock
sources for the timer counters.
STCR is initialized to H'00 by a reset.
Bits 7 to 4—I²C Control (IICS, IICD, IICX, IICE): These bits control operation of the I²C bus
interface. For details, see section 13, I²C Bus Interface.
Bit 3—Slave Input Switch (STAC): Controls the switching of the host interface input pins. For
details, see section 14, Host Interface.
Bit 2—Multiprocessor Enable (MPE): Controls the operating mode of serial communication
interfaces 0 and 1. For details, see section 12, Serial Communication Interface.
Bits 1 and 0—Internal Clock Source Select 1 and 0 (ICKS1 and ICKS0): These bits and bits
CKS2 to CKS0 in the TCR select clock sources for the timer counters. For details, see section
9.2.3, Timer Control Register.
198