HD64F3437TF16 Datasheet, PDF (326/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

13.3 Operation
13.3.1 I²C Bus Data Format
The I²C bus interface has three data formats: two addressing formats, shown as (a) and (b) in
figure 13.3, and a non-addressing format, shown as (c) in figure 13.4. The first byte following a
start condition always consists of 8 bits. Figure 13.5 shows the I²C bus timing.
(a) Addressing format (FS = 0)
S
SLA
R/W A
7
1
11
1
DATA
n
A
1
m
A/A P
1
1
n: Bit count
(n = 1 to 8)
m: Frame count
(m ≥ 1)
(b) Addressing format (retransmit start condition, FS = 0)
S
SLA
R/W A
DATA
1
7
11
n1
A/A S
11
SLA
R/W A
7
11
DATA
n2
1
m1
1
m2
n1 and n2: Bit count (n1 and n2 = 1 to 8)
m1 and m2: Frame count (m1 and m2 ≥ 1)
Figure 13.3 I²C Bus Data Formats (Addressing Formats)
A/A P
11
(c) Non-addressing format (FS = 1)
S
DATA
A
DATA
A
8
n
1
1
1
1
m
A/A P
1
1
n: Bit count
(n = 1 to 8)
m: Frame count
(m ≥ 1)
Figure 13.4 I²C Bus Data Format (Non-Addressing Format)
Legend:
S:
Start condition. The master device drives SDA from high to low while SCL is high.
SLA: Slave address, by which the master device selects a slave device.
R/W: Indicates the direction of data transfer: from the slave device to the master device when
R/W is 1, or from the master device to the slave device when R/W is 0.
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