HD64F3437TF16 Datasheet, PDF (288/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Table 12.7 Communication Formats Used by SCI
SMR Settings
Communication Format
Bit 7: Bit 6: Bit 2: Bit 5: Bit 3:
C/A CHR MP PE STOP Mode
Multi-
Data processor Parity
Length Bit
Bit
Stop
Bit
Length
0
0
0
0
0
1
Asynchronous
mode
8 bits None
None
1 bit
2 bits
1
0
Present 1 bit
1
2 bits
1
0
0
7 bits
None 1 bit
1
2 bits
1
0
Present 1 bit
1
2 bits
0
1
—0
1
1
0
Asynchronous 8 bits
mode (multi-
processor format)
7 bits
Present
None
1 bit
2 bits
1 bit
1
2 bits
1
————
Synchronous 8 bits None
mode
None
Table 12.8 SCI Clock Source Selection
SMR
Bit 7:
C/A
0
1
SCR
Bit 1: Bit 0:
CKE1 CKE0 Mode
0
0
Async
1
1
0
1
0
0
Sync
1
1
0
1
Serial Transmit/Receive Clock
Clock Source
Internal
External
SCK Pin Function
Input/output port (not used by SCI)
Serial clock output at bit rate
Serial clock input at 16 × bit rate
Internal
Serial clock output
External
Serial clock input
259