HD64F3437TF16 Datasheet, PDF (437/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

; Execute erase-verify
EVR:
MOV.W
MOV.W
ADD.W
MOV.W
SUB.W
LOOPEV:
EBRTST:
EBR2EV:
ADD01:
MOV.B
MOV.B
BSET
DEC
BNE
CMP.B
BEQ
CMP.B
BMI
MOV.B
SUBX
BTST
BNE
BRA
BTST
BNE
INC
MOV.W
BRA
ERASE1: BRA
ERSEVF:
EVR2:
LOOPEP:
MOV.W
MOV.B
MOV.B
MOV.B
DEC
BNE
MOV.B
CMP.B
BNE
MOV.W
CMP.W
BNE
SBCLR:
BLKAD:
CMP.B
BMI
MOV.B
SUBX
BCLR
BRA
BCLR
INC
BRA
HANTEI: BCLR
MOV.W
BEQ
#RAMSTR, R2
#ERVADR, R3
R3,
R2
#START, R3
R3,
R2
; Starting transfer destination address (RAM)
;
; #RAMSTR + #ERVADR → R2
;
; Address of data area used in RAM
#H'00,
#H'b,
#3,
R4H
LOOPEV
#H'0C,
HANTEI
#H'08,
EBR2EV
R1L,
#H'08,
R1H,
ERSEVF
ADD01
R1L,
ERSEVF
R1L
@R2+,
EBRTST
R1L
; Used to test R1L bit in R0
R4H
; Set erase-verify loop counter
@FLMCR:8 ; Set EV bit
;
; Wait loop
R1L
; R1L = H'0C?
; If finished checking all R0 bits, branch to HANTEI
R1L
;
; Test EBR1 if R1L ≥ 8, or EBR2 if R1L < 8
R1H
;
R1H
; R1L – 8 → R1H
R0H
; Test R1H bit in EBR1 (R0H)
; If R1H bit in EBR1 (R0H) is 1, branch to ERSEVF
; If R1H bit in EBR1 (R0H) is 0, branch to ADD01
R0L
; Test R1L bit in EBR2 (R0L)
; If R1L bit in EBR2 (R0H) is 1, branch to ERSEVF
; R1L + 1 → R1L
R3
; Dummy-increment R2
;
ERASE
; Branch to ERASE via Erase 1
@R2+,
R3
#H'FF, R1H
R1H,
@R3
#H'c,
R4H
R4H
LOOPEP
@R3+,
R1H
#H'FF, R1H
BLKAD
@R2,
R4
R4,
R3
EVR2
; Top address of block to be erase-verified
;
; Dummy write
; Set erase-verify loop counter
;
; Wait loop
; Read
; Read data = H'FF?
; If read data ≠ H'FF branch to BLKAD
; Top address of next block
; Last address of block?
#H'08, R1L
SBCLR
R1L,
R1H
#H'08, R1H
R1H,
R0H
BLKAD
R1L,
R0L
R1L
EBRTST
;
; Test EBR1 if R1L ≥ 8, or EBR2 if R1L < 8
;
; R1L – 8 → R1H
; Clear R1H bit in EBR1 (R0H)
;
; Clear R1L bit in EBR2 (R0L)
; R1L + 1 →R1L
;
#3,
R0,
EOWARI
@FLMCR:8 ; Clear EV bit
@EBR1 ;
; If EBR1/EBR2 is all 0, erasing ended normally
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