HD64F3437TF16 Datasheet, PDF (683/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

PBDDR—Port B Data Direction Register
H'BE
Port B
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
PB₇DDR PB₆DDR PB₅DDR PB₄DDR PB₃DDR PB₂DDR PB₁DDR PB₀DDR
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
Port B Input/Output Control
0 Input port
1 Output port
PBPIN—Port B Input Data Register
H'BD
Port B
Bit
7
6
5
4
3
2
1
0
PB₇
PB₆
PB₅
PB₄
PB₃
PB₂
PB₁
PB₀
Initial value
—*
—*
—*
—*
—*
—*
—*
—*
Read/Write
R
R
R
R
R
R
R
R
Note: * Depends on the levels of pins PB₇ to PB₀.
PBODR—Port B Output Data Register
H'BC
Port B
Bit
Initial value
Read/Write
7
PB₇
0
R/W
6
PB₆
0
R/W
5
PB₅
0
R/W
4
PB₄
0
R/W
3
PB₃
0
R/W
2
PB₂
0
R/W
1
PB₁
0
R/W
0
PB₀
0
R/W
Port B Output Data/Input Pull-Up Control
During output
During input
0
0 output
Input pull-up transistor off
1
1 output
Input pull-up transistor on
654