HD64F3437TF16 Datasheet, PDF (314/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

13.1.2 Block Diagram
Figure 13.2 shows a block diagram of the I²C bus interface.
STCR
ø_P
PS
SCL
Noise
canceler
Clock
control
ICCR
ICMR
SDA
Noise
canceler
Bus state
decision
circuit
Arbitration
decision
circuit
Output data
control
circuit
ICSR
ICDR
Address
comparator
Legend:
ICCR: I²C bus control register
ICMR: I²C bus mode register
ICSR: I²C bus status register
ICDR: I²C bus data register
SAR: Slave address register
PS: Prescaler
STCR: Serial timer control register
SAR
Interrupt
generator
Figure 13.2 Block Diagram of I²C Bus Interface
Interrupt
request
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