HD64F3437TF16 Datasheet, PDF (706/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

ADCR—A/D Control Register
H'E9
A/D
Bit
7
6
5
4
3
2
1
0
TRGE
—
—
—
—
—
—
—
Initial value
0
1
1
1
1
1
1
1
Read/Write
R/W
—
—
—
—
—
—
—
Trigger Enable
0 ADTRG is disabled.
1 ADTRG is enabled. A/D conversion can be started by external trigger,
or by software.
HICR—Host Interface Control Register
H'F0
HIF
Bit
7
6
5
4
3
2
1
0
—
—
—
—
— IBFIE2 IBFIE1 FGA20E
Initial value
1
1
1
1
1
0
0
0
Host Read/Write —
—
—
—
—
—
—
—
Slave Read/Write —
—
—
—
—
R/W
R/W
R/W
Fast Gate A20 Enable
0 Fast A20 gate function disabled
1 Fast A20 gate function enabled
Input Buffer Full Interrupt Enable 1
0 IDR1 input buffer full interrupt disabled
1 IDR1 input buffer full interrupt enabled
Input Buffer Full Interrupt Enable 2
0 IDR2 input buffer full interrupt disabled
1 IDR2 input buffer full interrupt enabled
677