HD64F3437TF16 Datasheet, PDF (101/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Keyboard Matrix Interrupt Mask Register (KMIMR)
To control interrupts from a 16 × 16 matrix keyboard at key-sense input pins KEYIN₀ to KEYIN₁₅,
there are two keyboard matrix interrupt mask registers, KMIMR and KMIMRA. Bits KMIMR7 to
KMIMR0 in KMIMR correspond to key-sense inputs KEYIN₇ to KEYIN₀. Bits KMIMR15 to
KMIMR8 in KMIMRA correspond to key-sense inputs KEYIN₁₅ to KEYIN₈. Initially, the
KMIMR6 bit that corresponds to the IRQ₆/KEYIN₆ pin is in the interrupt-enabled state, and the
other interrupt mask bits are in the interrupt-disabled state.
KMIMR is an 8-bit readable/writable register used in keyboard matrix scanning and sensing. This
register initializes to a state in which only the input at the IRQ₆ pin is enabled. To enable key-
sense input interrupts from two or more pins during keyboard scanning and sensing, clear the
corresponding mask bits to 0.
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
KMIMR7 KMIMR6 KMIMR5 KMIMR4 KMIMR3 KMIMR2 KMIMR1 KMIMR0
1
0
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bits 7 to 0—Keyboard Matrix Interrupt Mask (KMIMR7 to KMIMR0): These bits control
key-sense input interrupt requests KEYIN₇ to KEYIN₀.
Bits 7 to 0:
KMIMR7 to KMIMR0 Description
0
Key-sense input interrupt request is enabled.
1
Key-sense input interrupt request is disabled.
Note: * Except KMIMR6, which is initially 0.
(Initial value)*
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
KMIMR15 KMIMR14 KMIMR13 KMIMR12 KMIMR11 KMIMR10 KMIMR9
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
KMIMR8
1
R/W
Bits 7 to 0—Keyboard Matrix Interrupt Mask (KMIMR15 to KMIMR8): These bits control
key-sense input interrupt requests KEYIN15 to KEYIN8.
Bits 7 to 0:
KMIMR15 to KMIMR8 Description
0
Key-sense input interrupt request is enabled.
1
Key-sense input interrupt request is disabled.
(Initial value)
72