HD64F3437TF16 Datasheet, PDF (181/752 Pages) Hitachi Semiconductor – 12 V must not be applied to the S-mask model (single-power-supply specification), as this may permanently damage the device.

Port B Output Data Register (PBODR)
Bit
7
PB₇
Initial value
0
Read/Write R/W
6
PB₆
0
R/W
5
PB₅
0
R/W
4
PB₄
0
R/W
3
PB₃
0
R/W
2
PB₂
0
R/W
1
PB₁
0
R/W
0
PB₀
0
R/W
PBODR is an 8-bit register that stores data for pins PB₇ to PB₀. PBODR can always be written to
and read, regardless of the PBDDR settings.
PBODR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its existing values.
Port B Input Data Register (PBPIN)
Bit
7
6
5
4
3
2
1
0
PB₇
PB₆
PB₅
PB₄
PB₃
PB₂
PB₁
PB₀
Initial value
—*
—*
—*
—*
—*
—*
—*
—*
Read/Write
R
R
R
R
R
R
R
R
Note: * Depends on the levels of pins PB₇ to PB₀.
When PBPIN is read, the pin states are always read.
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