C8051F960-B-GM Datasheet, PDF (95/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
5.7. ADC0 Analog Multiplexer
ADC0 on C8051F96x has an analog multiplexer, referred to as AMUX0.
AMUX0 selects the positive inputs to the single-ended ADC0. Any of the following may be selected as the
positive input: Port I/O pins, the on-chip temperature sensor, the VBAT Power Supply, Regulated Digital
Supply Voltage (Output of VREG0), VDC Supply, or the positive input may be connected to GND. The
ADC0 input channels are selected in the ADC0MX register described in SFR Definition 5.12.
ADC0MX
P0.0
P2.3*
Temp
Sensor
VBAT
Digital Supply
VDC
AMUX
Programmable
Attenuator
AIN+
ADC0
Gain = 0.5 or 1
*P1.0 – P1.3 are not available as analog inputs
Figure 5.7. ADC0 Multiplexer Block Diagram
Important Note About ADC0 Input Configuration: Port pins selected as ADC0 inputs should be config-
ured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for analog
input, set to 0 the corresponding bit in register PnMDIN and disable the digital driver (PnMDOUT = 0 and
Port Latch = 1). To force the Crossbar to skip a Port pin, set to 1 the corresponding bit in register PnSKIP.
See Section “27. Port Input/Output” on page 351 for more Port I/O configuration details.
Rev. 1.0
95