C8051F960-B-GM Datasheet, PDF (151/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
SFR Definition 11.2. DMA0INT: DMA0 Full-Length Interrupt
Bit
Name
Type
Reset
7
6
5
4
3
2
1
0
CH6_INT CH5_INT CH4_INT CH3_INT CH2_INT CH1_INT CH0_INT
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
SFR Page = 0x2; SFR Address = 0xD3
Bit
Name
Function
7
Unused
Read = 0b, Write = Don’t Care
6
CH6_INT
Channel 6 Full-Length Interrupt Flag.¹
0: Full-length interrupt has not occured on channel 6.
1: Full-length interrupt has not occured on channel 6.
5
CH5_INT
0: Full-length interrupt has not occured on channel 5.
1: Full-length interrupt has not occured on channel 5.
4
CH4_INT
Channel 4 Full-Length Interrupt Flag.¹
0: Full-length interrupt has not occured on channel 4.
1: Full-length interrupt has not occured on channel 4.
3
CH3_INT
Channel 3 Full-Length Interrupt Flag.¹
0: Full-length interrupt has not occured on channel 3.
1: Full-length interrupt has not occured on channel 3.
2
CH2_INT
Channel 2 Full-Length Interrupt Flag.¹
0: Full-length interrupt has not occured on channel 2.
1: Full-length interrupt has not occured on channel 2.
1
CH1_INT
Channel 1 Full-Length Interrupt Flag.¹
0: Full-length interrupt has not occured on channel 1.
1: Full-length interrupt has not occured on channel 1.
0
CH0_INT
Channel 0 Full-Length Interrupt Flag.¹
0: Full-length interrupt has not occured on channel 0.
1: Full-length interrupt has not occured on channel 0.
Note: 1.Full-length interrupt flag is set when the offset address DMA0NAOH/L is equals to data transfer size
DMA0NSZH/L minus 1. This flag must be cleared by software or system reset. The full-length interrupt is
enabled by setting bit 7 of DMA0NCF with DMA0SEL configured for the corresponding channel.
Rev. 1.0
151