C8051F960-B-GM Datasheet, PDF (208/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
15.1. Manchester Encoding
To encode Manchester Data, first clear the MODE bit for Manchester encoding or decoding.
To encode, one byte of data is written to the data register ENC0L.
Setting the ENC bit will initiate encoding. After encoding, the encoded data will be in ENC0M and ENC0L.
The upper nibble of the input data is encoded and placed in ENC0M. The lower nibble is encoded and
placed in ENC0L.
Note that the input data should be readable in the data register until the encode bit is set. Once the READY
bit is set, the input data has been replaced by the output data.
The ENC and DEC bits are self clearing. The READY bit is not cleared by hardware and must be cleared
manually. The control register does not need to be bit addressable. The READY bit can be cleared while
setting the ENC or DEC bit using a direct or immediate SFR mov instruction.
Table 15.2. Manchester Encoding
Input Data
Encoded Output
nibble
byte
dec
hex
bin
bin
hex
dec
0
0
0000 10101010 AA
170
1
1
0001 10101001 A9
169
2
2
0010 10100110
A6
166
3
3
0011 10100101 A5
165
4
4
0100 10011010
9A
154
5
5
0101 10011001
99
153
6
6
0110 10010110
96
150
7
7
0111 10010101
95
149
8
8
1000 01101010
6A
106
9
9
1001 01101001
69
105
10
A
1010 01100110
66
102
11
B
1011 01100101
65
101
12
C
1100 01011010
5A
90
13
D
1101 01011001
59
89
14
E
1110 01010110
56
86
15
F
1111 01010101
55
85
208
Rev. 1.0