C8051F960-B-GM Datasheet, PDF (341/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
SFR Definition 26.3. LCD0CNTRST: LCD0 Contrast Adjustment
Bit
7
6
5
4
3
2
1
0
Name Reserved Reserved Reserved
CNTRST
Type R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x2; SFR Address = 0x9C
Bit
Name
Function
7:5 Reserved Read = 000. Write = Must write 000.
4:0 CNTRST Contrast Setpoint.
Determines the setpoint for the VLCD voltage necessary to achieve the desired
contrast.
00000: 1.90
00001: 1.96
00010: 2.02
00011: 2.08
00100: 2.13
00101: 2.19
00110: 2.25
00111: 2.31
01000: 2.37
01001: 2.43
01010: 2.49
01011: 2.55
01100: 2.60
01101: 2.66
01110: 2.72
01111: 2.78
10000: 2.84
10001: 2.90
10010: 2.96
10011: 3.02
10100: 3.07
10101: 3.13
10110: 3.19
10111: 3.25
11000: 3.31
11001: 3.37
11010: 3.43
11011: 3.49
11100: 3.54
11101: 3.60
11110: 3.66
11111: 3.72
Rev. 1.0
341